1. Field of the Invention
The present invention relates to a nonvolatile memory device, and more particularly, to the nonvolatile memory device in which setting of a threshold voltage is improved.
2. Description of the Related Art
An EEPROM, which is a nonvolatile memory device capable of electrically erasing a selected unit cell, includes a gate electrode obtained by sequentially stacking a tunnel oxide layer, a floating gate, an interdielectric layer and a control gate, and a source and drain region on a semiconductor substrate. A conventional EEPROM is electrically programmed or erased by injecting hot electrons into a floating gate through a tunnel oxide layer, or removing the hot electrons injected into the floating gate. However, when a program operation and an erasure operation are repeated, the tunnel oxide layer is deteriorated by electron trap, and reliability of the device is lowered.
FIG. 1 shows threshold voltages of the conventional EEPROM in an initial state, an erased state and a programmed state. In the conventional EEPROM of FIG. 1, the threshold voltage 120 in the initial state is approximately 2.5V, the threshold voltage 100 in the erased state is approximately 2V, and the threshold voltage 110 in the programmed state is approximately 6V.
So as to program the selected unit cell of the EEPROM, hot electrons need to be injected into the floating gate of the unit cell in the initial state so that the threshold voltage of the unit cell can be increased to the order of 6V, and so as to erase the programmed unit cell of the EEPROM, the hot electrons injected into the floating gate of the unit cell during the program operation need to be removed so that the threshold voltage of the unit cell can be reduced to the order 2V. Therefore, when the unit cell in the initial state is programmed, the amount (b) of a change of the threshold voltage is 3.5V, and when the programmed unit cell is erased, the amount (a+b) of a change of the threshold voltage is 4V. This means that many electrons must be injected into or removed from the floating gate through the tunnel oxide layer. However, if the amount of electrons passing through the floating gate is excessive, the tunnel oxide layer can be deteriorated due to electron trap. Also, an increase in the amount of electrons injected into the floating gate causes an additional strong electric field in addition to an external electric field applied to program the unit cell, so that the reliability of EEPROM may be lowered.
Meanwhile, the reliability of the EEPROM relates to the electron retention capability of the floating gate. However, in the case that the tunnel oxide layer is deteriorated due to excessive electron passing through as mentioned above, the electrons stored in the floating gate leak. As a result of this leaking phenomenon, the threshold voltage in the programmed state changes such that the reliability of EEPROM can be lowered.
To solve the above problem, it is an objective of the present invention to provide a nonvolatile memory device for minimizing the electric field due to the amount of charges stored in a floating gate during a program operation or an erase operation, without damaging a tunnel oxide layer. This results in the reliability of a device being enhanced.
According to an aspect of the present invention to achieve the above objective, in a nonvolatile memory device having a gate electrode obtained by sequentially stacking a gate insulating layer, a floating gate, an interdielectric layer and a control gate, a source region and a drain region, wherein the threshold voltage of an initial state, in which the floating gate is electrically neutral, is set to the mean value between the threshold voltage of a programmed state and the threshold voltage of an erased state. Here, the threshold voltage of the programmed state is 6V, the threshold voltage of the erased state is 2V, and the threshold voltage of the initial state is 3.5xcx9c4.5V. Also, the threshold voltage of the initial state is set to a desired value by implanting an impurity into a region where a channel is formed. The nonvolatile memory device is a flash memory, and hot electrons are injected into the floating gate to program the nonvolatile memory device, and the electrons stored in the floating gate are tunneled to erase the nonvolatile memory device.
According to another aspect of the present invention, in a nonvolatile memory device having a gate electrode obtained by sequentially stacking a gate insulating layer, a floating gate, an interdielectric layer and control gate, a source region and a drain region, wherein the threshold voltage of an initial state, in which the floating gate is electrically neutral, is the same as a voltage applied to a word line to read the data stored in the nonvolatile memory device. Here, the nonvolatile memory device is a flash memory. Also, hot electrons are injected into the floating gate to program the nonvolatile memory device, and the electrons stored in the floating gate are tunneled to erase the memory device.
According to the present invention, the threshold voltage in the initial state is set to the mean value between the threshold voltage in a programmed state and the threshold voltage in an erased state, so that the amount of negative charges passing through a tunnel oxide layer during a program operation is the same as the amount of positive charges passing through the tunnel oxide layer during an erase operation, to reduce generation of electron traps in the tunnel oxide layer. Also, the amount of electrons stored in the floating gate during a program and an erase operation is minimized, to thereby suppress the loss of the charges due to external conditions. As a result, the reliability of the device is enhanced.